物料参数
| Bank Switching: | N |
| Data Width: | x 36 |
| ECC: | Y |
| Frequency: | 200.0MHz |
| Lead Ball Finish: | Ni/Pd/Au |
| On-Die Termination: | N |
| Operating Temperature max: | 70.0°C |
| Organization (X x Y): | 1Mb x 36 |
| Peak Reflow Temp: | 260.0°C |
| Qualification: | Commercial |
| Read Latency (Cycles): | 1.0 |
| Family: | Synchronous SRAM with ECC |
| Architecture: | NoBL, Pipeline |
| Operating Voltage max: | 3.63V |
| Interfaces: | Parallel |
| Density: | 36.0MBit |
无库存